1. Field of the Invention
The present invention relates to a non-planar FET and a manufacturing method thereof, and more particularly to a non-planar FET which includes a sub spacer only on a middle sidewall of the fin structure and a manufacturing method thereof
2. Description of the Prior Art
In recent years, as various kinds of consumer electronic products have been constantly developed towards miniaturization and the size of semiconductor components has reduced accordingly, in order to meet requirements of high integration, high performances, and low power consumption for the products.
However, with the miniaturization of the electronic products, current planar transistors no longer meet these requirements. Non-planar transistors, such as fin field effect transistors (Fin-FET), have been therefore introduced to reach a high drive current and to lower short channel effects. However, due to the three-dimensional structure of the Fin-FETs, a lot of drawbacks raise as well. For example, the height of the fin structure, which corresponds to the channel width, is hard to control due to the use of HF in the etching process when patterning the substrate to form the fin structure. The quality of the Fin-FET is therefore affected.
Consequently, there is still a need for a novel FET structure and a method of making the same in order to improve the performances of the devices.